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Co-Packaged Optics – Heterogeneous Integration of Photonic IC and Electronic IC

March 5 @ 5:00 pm - 6:00 pm

Silicon photonics are the semiconductor integration of EIC and PIC on a silicon substrate (wafer) with complementary metal-oxide semiconductor (CMOS) technology. On the other hand, co-packaged optics (CPO) are heterogeneous integration packaging methods to integrate the optical engine (OE) which consists of photonic ICs (PIC) and the electrical engine (EE) which consists of the electronic ICs (EIC) as well as the switch ASIC (application specific IC). The advantages of CPO are: (a) to reduce the length of the electrical interface between the OE/EE (or PIC/EIC) and the ASIC, (b) to reduce the energy required to drive the signal, and (c) to cut the latency which leads to better electrical performance. In the next few years, we will see more implementations of a higher level of heterogeneous integration of PIC and EIC, whether it is for performance, form factor, power consumption or cost. The content of this lecture is shown below.

Speaker(s): Dr. John H. Lau,

Bldg: Birck Nano Technology Center, BRK 1001, 1205 W State St, West Lafayette, Indiana, United States, 47907, Virtual: https://events.vtools.ieee.org/m/407841